Driver circuit for latching type ferrite



July 21, 1970' J. H. KUCK DRIVER CIRCUIT FOR LATCHING TYPE FERRITE Filed Jan. 51, 1967 JOHN H. KUCK INVENTOR PDQE ORNEY United States Patent 3,521,079 DRIVER CIRCUIT FOR LATCHING TYPE FERRITE John H. Kuck, Silver Spring, Md., assignor to the United States of America as represented by the Secretary of the Navy Filed Jan. 31, 1967, Ser. No. 614,769 Int. Cl. H03k 3/26, 17/06, 17/64 US. Cl. 307-88 8 Claims ABSTRACT OF THE DISCLOSURE The present invention provides a simple and inexpensive, yet efficient, transistor current driver circuit capable of producing narrow, high current output pulses at a relatively fast pulse repetition rate. The driver circuit of the present invention is especially adapted for applying such output pulses into a saturable reactor load, such as a latching type ferrite element, for example, and produces the desired, relatively high, output current pulses by taking advantage of the so-called stored charge of the transistor. This permits the use of transistors having relatively low steady-state current carrying capability.

The present invention generally relates to current driver or pulsing circuitry and more particularly it pertains to a transistorized current driver circuit wherein the so-called stored charge of the transistor is taken advantage of in order to produce narrow, high current output pulses at a relatively fast pulse repetition rate.

Driver circuits, such as that proposed in accordance with the present invention, are likely to be used in great number in an over-all electronic system and therefore must be simple and inexpensive and yet as efficient as possible. For example, the proposed driver circuit was conceived for application in a phased array antenna system to supply control current pulses to each ferrite phase shifter employed therein; a total of approximately 40,000 of the driver circuits being needed. In such application, the function of the proposed driver circuit is to supply narrow, opposite polarity output current pulses of relatively high amplitude to each phase shifter so as to set the magnetization state of a latching type ferrite element contained in the phase shifter; i.e., the ferrite element is of the type which retains its magnetization once it is driven into saturation by a current pulse, until it is switched in the other direction by another current pulse of opposite polarity. Moreover, the proposed driver circuit is capable of producing these output current pulses at the relatively fast pulse repetition rate required in order to achieve rapid beam scanning in such phase array antenna. It should be understood at this time, however, that the proposed driver circuit is not restricted to use in a phased array antenna system, but, is generally adapted for supplying current drive pulses to a saturable reactor load.

As mentioned previously, the proposed driver circuit of the present invention produces the desired, relatively high amplitude output current pulses by taking advantage of the so-called, inherent stored charge of the transistor. Heretofore, this charge storing phenomenon in the transistor was often considered undesirable and many attempts were made to overcome its effect of causing output current flow after an input control pulse was terminated. Moreover, by virtue of the fact that the proposed transistor driver circuit employs a saturable reactor (e.g. the latching ferrite element) as its load, it is capable of utilizing this stored charge to achieve the desired current gain, without requiring an external source of collector power pulses, as was heretofore thought 3,521,079 Patented July 21, 1970 necessary. In other words, a simple DC. power supply suffices because the saturable reactor or ferrite load serves to generate the collector voltage required to remove or discharge the stored charge from the transistor when the load reaches saturation and switches from a high to a low impedance state.

In the phase array antenna application of the present invention previously mentioned, it is necessary to supply opposite polarity drive pulses to each latching ferrite element in order to selectively magnetize it in either of two directions. Consequently, it is proposed in accordance with the present invention to provide transistor driving circuitry capable of producing opposite polarity output pulses on a common output line including, in series, the saturable reactor load represented by the latching ferrite element. As mentioned previously, the proposed transistor driving circuitry is purposely kept simple and requires a minimum number of parts, in order to keep the cost of the driver circuit low so that it can economically be used in great numbers.

In view of the foregoing discussion, one object of the present invention is to provide a simple and inexpensive current driver circuit.

Another object of the present invention is to provide an improved current driver circuit capable of producing narrow, high current output pulses at a relatively fast pulse repetition rate.

A further object of the present invention is to provide an improved current driver circuit capable of producing relatively high current output pulses by taking advantage of the so-called stored charge within a transistor.

Another object of the present invention is to provide improved current driver circuitry capable of producing opposite polarity output current pulses.

Another object of the present invention is to provide current driver circuitry capable of producing opposite polarity output pulses on a common output line and particularly adapted for switching a saturable reactor load such as a latching type ferrite element.

A further object of the present invention is to provide transistorized current driver circuitry wherein improved current gain is achieved from each transistor stage by taking advantage of the stored charge within the transistor and wherein only a simple DC. power supply is needed to supply operating voltages to the transistor stage.

Other objects, purposes and characteristic features of the present invention will in part be pointed out as the description of the invention progresses and in part be obvious from the accompanying drawings, wherein:

. FIG. 1 is a circuit diagram of one embodiment of the current driver circuitry proposed in accordance with the present invention; and

FIG. 2 is a waveform of a typical output current pulse produced by the embodiment of FIG. 1.

Referring now to FIG. 1 and the preferred embodiment of the present invention, two substantially similar current driver circuits 9 and 9' are illustrated for supplying opposite polarity output current drive pulses to the saturable reactor load 10. This saturable reactor load 10 might, for example, be a latching type ferrite element, if the present invention is employed in the phased array antenna application previously discussed.

More particularly, each of the current driver circuits includes an emitter follower transistor stage, designated at 11 and 11 and a transistor switching stage designated at 12 and 12'. The emitter follower transistors 11 and 11' are complementary types; i.e., one is an NPN type and the other is a PNP type, which respond to opposite polarity input pulses represented at 13 and 13. The use of a complementary pair for the emitter followers 11 and 11' allows the opposite polarity input control pulses to be applied to the illustrated circuitry from a single input 7 wire which, in FIG. 1, is connected to the designated INPUT terminal. This obviously will reduce the total number of interconnecting cables or wires necessary in the overall electronic system wherein the current driver circuitry of the present invention is employed.

Inasmuch as both of the illustrated current driver circuits 9 and 9' are substantially similar in construction and operation, only one of the current driver circuits will be described in detail. Throughout FIG. 1 each of the corresponding circuit elements in the two current drivers is designated by an unprimed reference numeral in current driver 9 and by a primed reference numeral in current driver 9'.

More specifically, for current driver 9, the positive input pulse 13 is applied through resistor 14 to the base of the emitter follower transistor 11 where it is developed across base to ground resistance 15. The collector of the emitter follower transistor stage 11 is connected to a positive source of DC. potential whereas, the emitter of transistor 11 is connected, through emitter resistor 16 and the primary winding of coupling transformer 17, to ground such that the conduction of transistor 11 caused by input pulse 13 results in a corresponding positive pulse across the primary winding of transformer 17. Moreover, a diode 18 is connected from the emitter of transistor stage 11 to ground, in the polarity shown, in order to prevent any negative input pulse (such as is designated at 13) from affecting the operation of the switching transistor 12; i.e., a negative pulse passing from the INPUT terminal through the base'emitter stray capacity of transistor 11 and appearing at the emitter of transistor stage 11 would be shorted to ground through the diode 18.

The secondary winding of the coupling transformer 17 is connected between the base and emitter of the switching transistor stage 12 through emitter resistor 19, to apply to positive control pulse which is developed in the emitter circuit of transistor 11 to the base of switching transistor 12. The emitter of the switching transistor 12 is also coupled, via resistor 19, to a negative D.C. supply voltage The collector of switching transistor 12 is connected to ground through the parallel combination of the saturable reactor load in multiple with the series RC circuit comprising capacitor and resistor 21. The purpose of the RC network 20-21 is to suppress any undesirable voltage transients across the saturable reactor load element 10.

The purpose of the emitter resistor 19 in the transistor stage 12 is to cause feedback limiting of the peak amplitude of the current pulses supplied by the switching transistor 12 to the saturable reactor load element 10. As mentioned previously, storage capacitors were sometimes used, in prior current drivers, to limit the amplitude of the output current pulse. However, it has been observed that the use of capacitors for this purpose does not permit as short a minimum time between output pulses as is often required for some operations, such as the phased array antenna application discussed above.

It should be noted in FIG. 1 that if the feedback resistor 19 were not used, the switch-load combination would be directly across the power supply. Additionally, since the current output from the transistor stage 12 increases very rapidly after the saturable reactor load element 10 is driven into its low impedance state, as will be described hereinafter, the peak current which is reached before the switch transistor 12 is turned off would probably be extremely sensitive to variations in power supply voltage, control pulse width and the storage time and voltage drop of the switch transistor 12. These last two factors might cause the current pulse amplitude to be temperature sensitive and to vary from switch transistor to switch transistor. The inclusion of the feed back resistor 19 overcomes these problems and hold the peak amplitude of the output current pulse constant and quite independent of variations in power supply voltage and drive pulse width.

Bypass capacitor 22 is connected in multiple across the negative power supply input to the switching transistor 12 for the purpose of assuring a low impedance path for the current pulse through the switching transistor 12. Whether this bypass capacitor is required depends upon the length and impedance of the connecting leads from the switching transistor stage 12 to the power supply and also upon the amount of bypassing within the power supply itself.

Referring now to the right-hand driver circuit 9 comprising the other emitter follower stage 11 and switching transistor stage 12, it should be pointed out here that the coupling transformer 17 connected between the base and emitter of the right-hand switching transistor 12 is also efifective to reverse the polarity of the negative control pulse output from the emitter follower stage 11 before it is applied to the base of the switching transistor 12. In this manner, both of the switching transistors 12 and 12' can be of the same NPN type. It has been found that, in practice, the NPN type transistor switch is somewhat less expensive and more reliable than a PNP type switch in handling the relatively high peak current pulse (i.e., at least four amperes) that is required in the phased array antenna application discussed previously.

The operation of either of the illustrated current driver circuits 99 of FIG. 1 can be best understood by referring to the waveform of FIG. 2 which represents a typical output pulse from driver circuit 9. More specifically, when the positive input pulse 13 is applied to the emitter follower 11, it generates a corresponding positive control pulse in the emitter circuit of stage 11 which is coupled, by coupling transformer 17, to the base of the switching transistor 12 where it is effective to drive the transistor 12 into conduction.

Initially, the resultant collector load current of the transistor stage 12 increases gradually until the load element 10 saturates and thereby switches from its high to its low impedance stage. During the time prior to load saturation, the collector voltage of the switching transistor 12 is very low; most of the source voltage being dropped across the load 10. Moreover, during this time interval, stored charge is accumulated in the transistor 12. Subsequently, when the load 10 reaches saturation and thus switches to a relatively low impedance value, the stored charge of the transistor 12 is suddenly released and results in a relatively high peak amplitude, (e.g. four amperes) pulse of load current. The point at which this load saturation occurs is designated at 23, in FIG. 2.

As mentioned previously, the maximum or peak amplitude of the load current pulse is made quite independent of the power supply voltage and control pulse width by the feedback resistor 19. This resistor 19, more particularly, produces negative feedback which takes effect after the stored charge has been released from transistor 12 and causes this stage to cease operating as a saturated switch and to, instead, operate as an emitter follower until the applied control pulse terminates.

The right-hand current driver 9 operates in substantially this same manner as the driver 9 just described and produces a similarly shaped output current pulse of opposite polarity, by reason of the fact that the collector of switching transistor 12' is connected to a positive volt-age supply. Consequently, the load element 10 may be selectively supplied with opposite polarity current drive pulses, dependent upon the manner in which input trigger pulses are applied to the respective driver circuits 9 and 9.

Obviously, many modifications and variations of the present invention are possible in the light of the above teachings. It should therefore be understood that within the scope of the appended claims the invention may be practiced otherwise than as specifically described.

What is claimed is:

1. Driver circuitry for producing output current pulses comprising,

a switching transistor having a base, an emitter and a collector,

means connected to apply control pulses to the base of said switching transistor efiective to switch said transistor from a non-conducting to a conducting state,

a resistor means having one end connected to the emitter of said switching transistor, and

circuit means including in series a DC. voltage source and a saturable reactor load connected between the other end of said resistor means and the collector of said switching transistor,

said saturable reactor load having high and low impedance states and being operable to switch from said high impedance state to said low impedance state when a control pulse is applied to the base of said transistor,

the connection of said resistor means directly to said emitter enabling stored charge within said switching transistor to be applied to said saturable reactor load when said saturable reactor load switches to said low impedance state.

2. The driver circuit specified in claim 1 wherein said saturable reactor load is a latching type ferrite element.

3. The driver circuitry specified in claim 1 and further including,

a second switching transistor having a base, an emitter and a collector,

means connected to apply control pulses to the base of said second switching transistor, a second resistor means having one end connected to the emitter of said second switching transistor, and

circuit means connected between the other end of said second resistor means and the collector of said second switching transistor and including in series a DC. voltage source of opposite polarity from the DC. voltage source included in the series circuit means for said first switching transistor and said saturable reactor load, whereby said saturable reactor load is selectively supplied with current pulses of one polarity or another dependent upon which of said first and second switching transistors is supplied with said control pulses.

4. The driver circuit specified in claim 3 wherein the series circuit means for each of said switching transistors includes a common output wire operably connecting one side of said saturable reactor load in series with the collector of said first switching transistor and the other end of said second resistor means.

6 5. The driver circuitry specified in claim 3 wherein the control pulse applying means comprises,

a pair of emitter follower transistor stages, each having a base, an emitter and a collector and each being asr sociated with one of said first and second switching transistors,

means connected to supply input pulses to each of said emitter follower transistor stages, and

coupling means connected to couple the output pulses from each of said emitter follower stages as control pulses to the base of the associated one of said first and second switching transistors.

6. The driver circuitry specified in claim wherein,

said pair of emitter follower transistor stages are adapted to selectively respond to opposite polarity input pulses,

said first and second switching transistors are adapted to be rendered conductive by the same polarity of control pulse, and

the coupling means connected to couple the output pulse from one of said emitter follower stages includes a transformer effective to reverse the polarity of said output pulse before it is applied as a control pulse to the base of the associated on of said first and second switching transistors.

7. The driver circuitry specified in claim 5 wherein said means connected to supply input pulses to each of said emitter follower transistor stages includes,

a common input wire that is selectively energized with opposite polarity pulses, and

means connecting said common input wire to the base of each of said'emitter follower transistor stages.

8. The driver circuitry specified in claim 7 wherein each emitter follower stage includes a diode connecting the emitter of said emitter follower to ground, wherby only a single predetermined polarity of input pulse is effective to produce output pulses to be coupled to the associated switching transistor.

References Cited UNITED STATES PATENTS 3,331,965 7/1967 Andreasen 30788 XR 3,395,404 7/1968 Bittmann et al. 30788 XR FOREIGN PATENTS 789,478 1/ 1958 Great Britain.

0 TERRELL W. FEARS, Primary Examiner G. M. HOFFMAN, Assistant Examiner- U.S. Cl. X.R. 307270, 314 

